Sr/Staff Power Management Design Engineer

Palo Alto, CA, United States

Array Labs is building a distributed radar imaging constellation to power the first accurate, real-time 3D model of the world.

The Hardware Engineering team at Array Labs is responsible for the analysis and design of our satellite and ground-station hardware platforms. These platforms tend to be a heterogeneous mix of various subsystems like compute, memory, peripherals with high-speed interfaces, RF, sensing, power management, navigation, and controls. The focus areas of the Hardware Engineering Team can be split into Aerospace/Avionics, Electrical/Electronics (EE), and Communications/Radar engineering. As a Power Management Design Engineer in the Communications/Radar team, you will own the simulation, design, prototyping, validation, and production of the critical power management system for the radar/communication payload on our satellites. You will be collaborating with RF, communications, and radar engineers to ensure the design satisfies the stringent requirements necessary to support Array Lab’s mission objectives.

Responsibilities: Translating high-level power requirements into design specifications, evaluating design trade-offs, and defining high-efficiency power management architecture

Design and simulation of power supply circuits for the radar and communication subsystems

Work with vendors and partners to select components for cost-optimized designs

Create schematics and work closely with PCB designers to ensure proper layout for decoupling and power distribution

Develop and build prototypes of (sub-)circuits for testing and evaluation

Prepare comprehensive test plans and conduct thorough characterization of power management systems to validate performance

Debug issues related to power management functionality and performance

Collaborate with cross-functional teams, including antenna, RF, digital communication, and radar engineers, to ensure power management designs meet system-level requirements

Work with contract manufacturers for mass production, testing, calibration and integration of power management systems into our satellites

Basic Qualifications: Master’s degree in electrical engineering, semiconductor device physics, or related field

2+ years of hands-on experience building, testing, and delivering power supply circuits for high-power high-volume products

Strong background in analog circuit design, with a focus on switched-mode power converters and linear power regulators

Experience with circuit design and simulation tools such as Cadence (Spectre), OrCAD, PSPICE, LTspice, etc.

Hands-on experience with common lab equipment such as power supplies, oscilloscopes, signal generators, network analyzers, and logic analyzers

Experience with data analysis and programming tools such as MATLAB and/or Python

Excellent teamwork, communication, and documentation skills

Learns new concepts rapidly, completely, and in a self-directed manner

High level of self-motivation and personal accountability

Ability to work in a fast-paced environment under significant time constraints

Preferred Skills and Experience: Ph.D. in electrical engineering, semiconductor device physics, or a related field

Experience with system power architecture

Experience with high-voltage high-power semiconductors (Si/SiC/GaN) and protection circuit design

Experience with design for fault tolerance and reliability

Experience with battery pack design, chargers, and battery management systems (BMS) is a plus

Familiarity with EMC requirements and EMI mitigation techniques relevant to power conversion systems

Experience with thermal analysis and simulation tools

Experience with parasitic extraction tools

Experience with schematic capture and board layout using CAD tools such as Altium Designer, Allegro, ORCAD, etc.

Hands-on tuning skills at the bench to optimize system performance

ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

Equal Opportunity Employer Array Labs is an Equal Opportunity Employer. Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.

Interview Process

We will conduct three interviews via Zoom; the typical process takes around 2-4 weeks to complete from start to finish.

Hiring and Compensation Strategy

Our hiring and compensation strategy is simple:

1) find uncommonly good people

2) pay them uncommonly well

You can anticipate competitive pay, with high flexibility between salary and equity-based compensation.

Why you should joinArray Labs

Array Labs is launching a constellation of satellites to create the first high-resolution, real-time, three-dimensional model of Earth. Our next-generation satellite technology will offer image quality 60x greater than traditional techniques, profoundly expanding humanity’s ability to understand and respond to events on a global scale.

In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.

#J-18808-Ljbffr