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InnoPhase IoT
San Jose, CA, United States
About InnoPhase IoT If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of worknot just singing the same song every day, you
Job Source: InnoPhase IoTInnoPhase IoT
San Jose, CA, United States
Staff/Sr. Staff PHY Design Engineer Job Description: Join Innophase IoT group as a PHY Design Engineer and be responsible for Low-power WiFi, BT/BLE micro-architecture and design. You will be involved in the design development cycle, which includes participating in high-level product specifications, RTL development, working closely with Algorithm
Job Source: InnoPhase IoTApple, Inc.
Sunnyvale, CA, United States
Summary Posted: Feb 12, 2024 Role Number: 200521857 Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the prod
Job Source: Apple, Inc.Samsung Electronics GmbH
San Jose, CA, United States
Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering t
Job Source: Samsung Electronics GmbHApple Inc.
Sunnyvale, CA, United States
Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vert
Job Source: Apple Inc.Conductor
San Jose, CA, United States
What You’ll Do Do you want to be part of world class team with flexibility of a startup? Are you able to incubate new ideas and drive them to closure in the physical layer? As a Staff Wireless PHY Standards Architect, you will be responsible for driving and designing the next generation of physical layer for wireless technologies. You will get to
Job Source: Conductord-Matrix
Santa Clara, CA, United States
d-Matrix has fundamentally changed the physics of memory-compute integration with our digital in-memory compute (DIMC) engine. The "holy grail" of AI compute has been to break through the memory wall to minimize data movements. We've achieved this with a first-of-its-kind DIMC engine. Having secured over $154M, $110M in our Series B offering, d-Mat
Job Source: d-MatrixInnoPhase IoT
San Jose, CA, United States
About InnoPhase IoT If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of worknot just singing the same song every day, you
Job Source: InnoPhase IoTSan Jose, CA, United States
Job Description:
Join Innophase IoT group as a hands-on PHY Verification Engineer and be responsible for Low-power WiFi, BT/BLE verification. You will be involved in the design development cycle, which includes participating in high-level product specifications, UVM Testbench design, test planning, working closely with Systems, SW, and design engineers.
Your specific responsibilities may include but are not limited to the following:
Define, Develop, and refine hierarchical UVM testbench for verification of wireless PHY and MAC layers.
Work closely with design and system engineers to develop constraint random testbench with reference C model.
Identify bottlenecks in design and verification coverage and provide feedback on potential optimizations.
Work closely with Verification, and Validation teams on test-plans, coverage-analysis
Maintain releases, run, and track regressions, and identify functional and code coverage gaps.
Develop, and refine design, verification and analysis tools and flows, as needed.
Required Qualifications:
BSEE or MSEE, with experience in UVM testbench development, constraint random testing, coverage analysis.
7+ years of experience in RTL, and gate-level verification
Basic understanding of Digital Signal Processing theory
Experience in verifying WiFi Physical Layer, and/or another Physical layer like Cellular (WiMax, LTE, NR), Bluetooth, Zigbee, UWB, and/or other Physical layer (Ethernet) technologies.
Ability to work independently, and proactively identify and resolve issues.
Experience with Incisive/Xcelium/VCS, Verdi or equivalent tools
Enjoy debugging, and problem solving in a team environment.
Preferred Qualifications:
Experience in verifying Low Power designs, involving multiple power, and voltage domains.
Establish System Verilog Assertions for functional verification.
Embedded SW & HW design is a strong plus.
Experience with Python, Perl, Tcl, C/C++ and shell scripts.
Experience with lab debug, multi-team, multi-site working environment is a strong plus.
Experience with ASIC and FPGA synthesis flows utilizing industry leading flows.
Experience using PowerArtist/Joules and providing actionable feedback into design
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Email Alert for Staff/Sr Staff PHY Verification Engineer jobs in San Jose, CA, United States
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