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Meta
Austin
**Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, foc
Job Source: MetaMeta
Austin
**Summary:** Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving
Job Source: MetaMeta
Austin
**Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, foc
Job Source: MetaTEL
Austin, TX, United States
Let's search for your next career at TEL. Use the form below to search our current opportunities and then apply. Please consider joining our Talent Community so that we may continue to engage with you. Job Description Business Line Description: TEL's new Integrated Circuit Design Solutions (ICDS) team is seeking a Lead Physical Design Engineer t
Job Source: TELTokyo Electron Limited
Austin, TX, United States
Senior ASIC Design Engineer page is loaded Senior ASIC Design Engineer Apply locations Austin / Headquarters time type Full time posted on Posted 3 Days Ago job requisition id R24-01853 Let’s search for your next career at TEL. Use the form below to search our current opportunities and then apply. Please cons
Job Source: Tokyo Electron LimitedAmazon
Austin
Description Join the team which delivers highly differentiated silicon into Blink and Ring battery powered devices. Our team works on state-of-the art SoCs in a vertically integrated team environment to deliver products our customers love. Drive early architectural and micro-architectural trade-offs to reduce time-to-revenue by shortening the time
Job Source: AmazonMeta
Austin
**Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration. We are looking for talented individuals with deep experience that span one or more of the key areas required to build successful world-class complex SoC
Job Source: MetaChelsea Search Group
Austin, TX, United States
Senior DFT Engineer Remote/work from any US location Full-time/Direct-hire + Benefits US Citizen or US Permanent Resident only Job Description : • Lead efforts to map customer designs into company’s ASIC technology • Timing constraints • Simulation, Conduct Code Synthesis • Test insertion (Scan, ATPG, MBIST) and Test Support • Provide Cust
Job Source: Chelsea Search GroupAustin
**Summary:**
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
**Required Skills:**
ASIC Engineer, Design Verification Responsibilities:
1. Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification.
2. Develop functional tests based on verification test plan.
3. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.
4. Debug, root-cause and resolve functional failures in the design, partnering with the Design team.
5. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality.
6. Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.
**Minimum Qualifications:**
Minimum Qualifications:
7. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification.
9. Track record of 'first-pass success' in ASIC development cycles.
10. 5+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies.
11. Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
12. Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
**Preferred Qualifications:**
Preferred Qualifications:
13. Experience in development of UVM based verification environments from scratch.
14. Experience verifying GPU/CPU designs.
15. Experience with micro-architectural performance verification.
16. Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs.
17. Experience with verification of ARM/RISC-V based sub-systems or SoCs.
18. Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet.
19. Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.
20. Experience working across and building relationships with cross-functional design, model and emulation teams.
21. Experience with revision control systems like Mercurial(Hg), Git or SVN.
**Public Compensation:**
$136,000/year to $203,000/year + bonus + equity + benefits
**Industry:** Internet
**Equal Opportunity:**
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].
Email Alert for ASIC Engineer, Design Verification_ jobs in Austin
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