Design Verification Engineer

Austin, TX, United States

Design Verification Engineer page is loaded Design Verification Engineer Apply locations US, Texas, Austin time type Full time posted on Posted 2 Days Ago job requisition id JR0257198 Job Details: Job Description:  Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

This position is an IP Verification Engineering role on the Atom MBOX Subsystem team, within Intel’s All Cores Engineering (ACE) Group.

Our team delivers Intel’s industry leading IP solutions to our Client and Xeon Server products lines.

Who You Are

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitect's, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products.

Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Must possess a BS in Electrical Engineering, Computer Engineering, Computer Science or similar field with 3+ years of experience OR MS in Electrical Engineering, Computer Engineering, Computer Science or similar field with 2+ years' experience.

At least 2+ years of experience in:

• Experience in the validation of ASIC's or IP blocks or SOC's.

• UVM/OVM testbench experience.

• Strong background in computer architecture such as pipelined systems, cache subsystems and coherency

• Background and knowledge of system architecture such as I/O connectivity and interrupt handling

• Experience writing System Verilog

• Programming experience in C++, Perl, Python

• Experience in a range of internal and 3rd-party logic and design verification tools

• Experience with SoC integration and/or verification

• Experience developing testbench components such as: BFMs, monitors, checkers, etc.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location:  US, Texas, Austin Additional Locations: Business group: In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

About Us Intel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please click here .

#J-18808-Ljbffr