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Voragotech
Austin, TX, United States
Do you love Space and want to leave your technical mark on exploring mankind’s next frontier? Does being a part of working with clients designing the next state-of-the-art spacecraft for near-earth orbit, Mars, Lunar and deep space explorations inspire you? Investment in Space organizations is at an all-time high, and you could have a seat at the t
Job Source: VoragotechEnergy Jobline CVL
Austin, TX, United States
JOB TITLE: Design Verification Engineer LOCATION: Austin, TX DURATION: 1 year PAY RANGE: $90 - $120/hr TOP SKILLS: • Current state-of-the-art testbench development such as UVM methodology • Experience in design verification with UVM and SystemVerilog is a MUST • 5-15 year's industry experience in a design verification role. COMPANY: Our cl
Job Source: Energy Jobline CVLCorrect Designs
Austin, TX, United States
Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in
Job Source: Correct DesignsMeta Platforms, Inc.
Austin, TX, United States
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on deve
Job Source: Meta Platforms, Inc.Arteris
Austin, TX, United States
Description Senior Design Verification Engineer (Arteris, Inc. dba Arteris IP; Austin TX): Research, design, develop, and test electronic components and systems for commercial and industrial use. Determine project material or equipment needs and analyze electronics system requirements, capacity, cost, and user needs to determine project feasibilit
Job Source: ArterisMIPS Technologies
Austin, TX, United States
We are seeking an experienced Senior Verification Engineer. This position involves hands-on experience with CPU verification using industry-standard functional verification methodologies, constrained random generators, and reference model-based checkers. The candidate must be able to completely own verification closure for a block or feature. This
Job Source: MIPS TechnologiesWhoznxt
Austin, TX, United States
Design Verification Engineer (GPU) 6 Months Contract Local to market in Austin, TX - - Hybrid onsite 3 days per week (No Remote candidate) As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operatio
Job Source: WhoznxtMarvell Semiconductor, Inc.
Austin, TX, United States
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire i
Job Source: Marvell Semiconductor, Inc.Austin, TX, United States
Summary
Posted: Mar 4, 2024
Role Number: 200455268
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us.
Key Qualifications
- Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
- Knowledge of SystemVerilog, digital simulation and debug
- Knowledge of computer architecture and digital design fundamentals
- SW programming skills with knowledge of data structures and algorithms
- Experience with Python, Perl, or similar scripting language
- Ability to work independently to deliver the project goals
- Knowledge of verification methodologies like UVM
- Experience with C/C++, assembly is a plus
- Excellent interpersonal skills and the dream to tackle diverse challenges
Description
As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test optimally. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. The SOC contains many subsystems and IP, so you may be working on one or several of the following types of IP: - Neural Engine hardware - DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec formats such as VP9, AV1 - Hardware security, including cryptographic algorithm implementations - High-Speed IO standards such as PCI Express, DisplayPort, MIPI - Power management and fabric infrastructure - Memory cache management - Display Subsystem for variety of panels and products These are just some examples of the exciting designs that are part of our team. Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems. It's up to you!
Education & Experience
Minimum of BS + 3 years relevant industry experience.
Additional Requirements
Additional Requirements
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Design Verification Engineer jobs in Austin, TX, United States
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