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Correct Designs
, ID, United States
Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin,
Job Source: Correct DesignsOho Group Ltd
united states
Come aboard a pioneering hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to revolutionize silicon by crafting Risc-V based computing platforms set to redefine the industry. Here, you'll collaborate with some of the globe's most talented and dedicated engineers, shaping designs that push the boundaries of perfor
Job Source: Oho Group LtdFidelis Companies
united states
Principal ASIC/SoC Verification Engineer Role Overview As a Principal ASIC/SoC Verification Engineer you'll play a pivotal role in verifying IP for ASIC products, including custom AI chips. This position demands expertise in IP and subsystem verification, particularly in SerDes and processor subsystems, among other IP components. Key Responsibili
Job Source: Fidelis CompaniesMastech Digital
united states
Job Description Role Overview Current state of the art testbench development such as UVM methodology Experience in design verification with UVM and System Verilog is a MUST As a Design Verification Engineer, you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities Triage regr
Job Source: Mastech DigitalSynapse Design Inc.
united states
Key responsibilities: · 5+ years of working experience in Design verification. · Pre-Silicon IP validator for USB IP · The works involved subsystem-level verification. · Knowledge in test plan writing, writing tests in UVM and System Verilog, · Able to debug RTL issues, coverage writing and SVA, waveform debug using Verdi. If you're interested, pl
Job Source: Synapse Design Inc.PRI Global
united states
Vendor shall perform development work for Meta Reality Labs Research hardware projects, including: Create Manufacturing Test plan for program builds. Collaborate with the research hardware team and external CM/JDM vendors to create a test plan, which sets design verification test requirements and deliverables. Track the design verification program
Job Source: PRI GlobalIntelliswift Software
united states
Role: Hardware Engineer IV (Design Verification Engineer IV) Location: Redmond, WA Job Term: 12 months contract with possibility of extension (on W2) Must-Have Skills: Proven experience in designing verification test requirements within consumer electronic devices Python experience and experience with test equipment and measurement techniques to v
Job Source: Intelliswift SoftwareZenex Partners
united states
Position Title: Design Verification Engineer (GPU Subsystems) Department: Technical Location: Austin, Texas Metropolitan Area Position Type: Extendable contact for 12 month Role type : W2, C2C and 1099 Description: As a Design Verification Engineer, you will play a pivotal role in ensuring the functional verification of GPU Subsystems, including Sh
Job Source: Zenex PartnersNew York, NY, United States
Saint Albans , Hertfordshire , United Kingdom
Do your life’s best work here - with the whole world watching .Join a rapidly growing team at our UK GPU design centre.At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly.The Design Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores.This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a strong foundation in verification methodology will be used to close testing coverage with high confidence.
Key Qualifications
Expertise with verification languages such as SystemVerilog, Specman or Vera and verification methodologies such as UVM/OVM is a plus.
Experience of working in complex ASIC or SOC designs
Expertise with HDL simulators and waveform viewers
Experience defining coverage space, writing coverage model, analyzing results
Experience working under strict schedule deadlines with the ability to handle multiple priorities
Graphics architecture and programming (OpenGL/OpenCL) highly desired. Strong knowledge of computer architecture, general purpose microprocessor and memory sub-system micro-architecture in lieu of graphics experience.
Experience with scripting languages like Python, Go, Perl or Ruby a plus
Excellent communication skills and ability to collaborate
Description Use SystemVerilog, UVM and C++ with industry leading simulation tools and methodologies to verify complex GPU designs.Develop verification plans in coordination with design leads and architectsCreate and maintain verification test bench components and environmentsGenerate directed and directed random testsRun simulations and debug design and environment issuesBuild functional coverage points, analyze coverage, and improve test environment to target coverage holesBuild automated verification flows for block verificationWork with other block and core level engineers to ensure seamless verification flow
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Design Verification Engineer jobs in New York, NY, United States
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