Email Alert for
ⓘ There was an unexpected error processing your request.
Please refresh the page and try again.
If the problem persists, please contact us with your issue.
You can always manage your preferences and update your interests to ensure you receive the most relevant opportunities.
Get ready to discover your next great opportunity.
InnoPhase
San Diego, CA, United States
Job Description Job Description About InnoPhase, Inc. INNOPHASE is a rapidly growing pre-IPO communications semiconductor company with headquarters in San Diego, CA, and advanced design centers in Irvine, CA, San Jose, CA, and Bangalore, India. We are pioneering a revolutionary 5G platform that will transform cellular network deployments. Util
Job Source: InnoPhaseApple Inc.
San Diego, CA, United States
Are you a leader? Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon
Job Source: Apple Inc.Apple
San Diego, CA, United States
ASIC Digital Design Engineer Lead San Diego,California,United States Hardware Are you a leader? Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? We have an extraordinary opportunity for senior l
Job Source: AppleNorthrop Grumman
San Diego, CA, United States
Location: San Diego, California, United States of America Clearance Type: Secret Telecommute: No- Teleworking not available for this position Shift: 1st Shift (United States of America) Travel Required: Yes, 10% of the Time Relocation Assistance: Relocation assistance may be available At Northrop Grumman, our employees have incredible o
Job Source: Northrop GrummanNorthrop Grumman Corp. (AU)
San Diego, CA, United States
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atla
Job Source: Northrop Grumman Corp. (AU)Leidos
San Diego, CA, United States
Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in D
Job Source: LeidosLeidos Holding
San Diego, CA, United States
Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in D
Job Source: Leidos HoldingLeidos
San Diego, CA, United States
Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate innovative custom microelectronics in support of warfighter missions. Candidate will have a strong background in
Job Source: LeidosSan Diego, CA, United States
As a Staff Engineer, Digital Design, you will be working with a team of design engineers to develop novel 5G ORAN SoC products for connectivity and wireless communications. You will be contributing to micro-architecture and design of digital functional blocks based on product requirements. In addition to delivering high-quality digital solutions in the context of the product architecture, the team supports other disciplines with work products such as Verilog stimulus files, test benches for device bring-up/characterization, test vectors for product manufacturing, etc.
This is a full-time position in either in San Diego, CA, or Irvine, CA.
Key Responsibilities
Design and integrate SERDES controller, PCS, PMA functional blocks
Micro code development for network processor
Network processor architecture, throughput analysis and optimization
Front-to-back ASIC digital design and verification – RTL through physical implementation
Define & review synthesis constraints for functional blocks
Functional issues debugging and timing closure issues debugging
Work with System, Software, RF, Analog, and Test teams and provide the necessary support
Job Requirements
MS/Ph.D. EE/CS preferred
10 or more years of experience in digital SoC development required
Industrial design experiences PCIE/JESD/Ethernet controller & PCS and respective SERDES PHY digital (PMA)
Strong knowledge on CPU bus protocols and designs such as AXI/AHB/APB and DMA
Solid design skill in Verilog / SystemVerilog RTL for complex SOC functional blocks in network products
Solid experience in static timing analysis, defining timing constraints and exceptions
Proficient in (Verilog/VHDL) and SystemVerilog RTL coding, LINT, CDC checking
Experience in using Synopsys CoreConsultant IP generation tools is a plus
Experience bringing highly integrated mixed-signal SoCs to commercial mass production
Experience with embedded systems, wireless protocols, power management, signal processing, and standard digital interfaces
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of languages such as C/C++, Perl, Tcl, and Python
Strong communication and presentation skills
Team player with a strong sense of urgency to complete projects on time
Desirable Skills
Experience with Cadence F2B design tools
Experience with formal verification tools
Able to work effectively with incomplete or changing requirements
Strong knowledge of mixed-signal concepts
Compensation and Benefits:
At InnoPhase, our compensation package includes base pay and pre-IPO stock options. The base pay range for this role is between $130K-$190K. Your base pay will depend on the market, interview results, skills, qualifications, experience, education, and location. Our employee benefits include a comprehensive group health plan, matching 401(k), training reimbursement, and various paid leaves (vacation, sick, holidays, maternity/paternity leave, jury). Visit our website to learn more about our employee benefits.
#J-18808-Ljbffr
Email Alert for Staff Engineer, ASIC Digital Design jobs in San Diego, CA, United States
ⓘ There was an unexpected error processing your request.
Please refresh the page and try again.
If the problem persists, please contact us with your issue.
You can always manage your preferences and update your interests to ensure you receive the most relevant opportunities.
Get ready to discover your next great opportunity.