Power Management Systems Design and Verification Engineer
San Diego, CA, United States
Researches, designs and develops hardware and software solutions at the chipset and/or feature level. Specifies power management products, functions and supporting software to meet these chipset level requirements. Tracks industry technology trends, interacts with key customers and other QCT tech teams to define these chipset and power management products. Ensures system-level performance and power metrics are met. Oversees test platform HW/SW development, test planning and post-silicon verification. Drives triage of problems at the system-level to determine root cause. Requires expertise in one or more of the following engineering disciplines: power electronics (switch mode and linear), high bandwidth/low latency control interfaces, thermal analysis, power distribution networks, firmware coding, Python or similar scripting languages, PCB layout and construction, battery chemistry and industry standard interfaces (e.g. DDR, R_UIM, SDIO, USB etc.). Uses design and simulation tools such as MATLAB, Excel and Mentor Graphics. Provides technical expertise for next generation initiatives.
Preferred Qualifications:
• 2+ years of experience in one or more of the following areas: SMPS, LDO, Buck Converters, Boost Converters, Clock system generation and distribution, Battery charging and USB, Wireless battery charger, Battery fuel gauging, Haptics ERM/LRA, Precision references, Mobile phone hardware, PWB design, Chipset infrastructure and digital interfaces.
Principal Duties and Responsibilities:
• Uses tools/applications (e.g., SPICE, MATLAB, CADENCE, PYTHON, etc.) to execute and debug the system design of a specific chipset and/or feature according to design/feature specifications and requirements under guidance from more senior engineers.
• Owns a specific sub-system of chipset design; develops and reviews PCB (Printed Circuit Board) schematics and design layouts under guidance from more senior engineers.
• Writes basic tests and regressions to identify any bugs in own work.
• Documents basic details about materials, components, data and assemblies for a PMIC under the supervision of more experienced engineers.
Level of Responsibility:
• Working under close supervision.
• Taking responsibility for own work and making decisions with limited impact; impact of decisions is readily apparent; errors made typically only impact timeline (i.e., require additional time to correct).
• Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.
• Working within prescribed budget and resources.
• Completing some tasks with multiple steps which must be performed in a specific order; directions or manuals can accurately document the steps necessary to perform the task.
• Exercising some creativity to troubleshoot technical problems or deal with novel circumstances.
• Limited problem solving required, generally in the nature of troubleshooting simple processes or technology.
The responsibilities of this role do not include:
• Providing supervision/guidance to others.
• Influence over key organizational decisions.
• Role in strategic planning.
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