Analog / Mixed Signal ASIC Design Engineer, Senior
San Diego, CA, United States
QCT mixed-signal IP design team is looking for talented analog integrated circuit designers at various levels to help with designing high-performance and low-power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) for Qualcomm’s products targeted for 5G, AI/ML, compute, and automotive applications. QCT mixed-signal design team consists of architects and ASIC designers, protocol experts, signal processing engineers, and algorithm designers and we are looking for new talents in the area of analog circuit design for our ASICs.
Responsibilities:
1. Work in our analog design team for schematic capture and simulations and participate in architecture definition and analog/digital design partitioning.
2. Schematic capture and simulations in the Cadence Virtuoso tool suite.
3. Work with cross functional teams (i.e. layout and digital teams)
4. Work with testing team for silicon bringup and debugging
Required Qualifications
Master's degree in Electrical Engineering or related field.
Demostrated interrest in analog circuit design by course selections and/or work experience.
Experience working with ASIC design tools such as Cadence Virtuoso.
Preferred Qualifications
Several years of industry experience in the area of analog integrated circuit/system design.
Experience as an analog desinger of mixed-signal IPs, such as SerDes, DDR, PLL, DAC, ADC, sensors
Familiar with Matlab and Python and good understanding of architecture, system and integration aspects for mixed-signal
Good understanding of design for yield and production challenges with DDR systems
Good understanding of Signals and Systems, Sampled Domain signal processing a plus
#J-18808-Ljbffr