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MIPS Technologies
San Jose, CA, United States
We are seeking an experienced Sr. Staff Design Engineer - Microarchitect. In this role you will be responsible for leading and owning RTL development of one or more modules of a high-performance CPU core. This position will be responsible for all aspects of the design including Performance, Power, and Area. You will: Drive the micro-architecture
Job Source: MIPS TechnologiesMIPS Technologies
San Jose, CA, United States
We are seeking an experienced Design Verification Manager. This position requires extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification, constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and complet
Job Source: MIPS TechnologiesMIPS Technologies
San Jose, CA, United States
We are seeking an experienced Senior Staff Verification Engineer. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions a
Job Source: MIPS TechnologiesMIPS Technologies
San Jose, CA, United States
We are seeking an experienced Principal Design Engineer - Microarchitect. Responsible for leading and owning RTL development of one or more modules of a high-performance CPU core. Hands-on working knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core is required. The candidate will be responsible for all aspects
Job Source: MIPS TechnologiesMIPS Technologies
San Jose, CA, United States
We are seeking an experienced Design Verification Manager. This position requires extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification, constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and complet
Job Source: MIPS TechnologiesMIPS Technologies
San Jose, CA, United States
We are seeking an experienced Principal Design Engineer - Microarchitect. Responsible for leading and owning RTL development of one or more modules of a high-performance CPU core. Hands-on working knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core is required. The candidate will be responsible for all aspects
Job Source: MIPS TechnologiesMinster Bank
San Jose, CA, United States
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Job Source: Minster BankUSA Tech Recruitment
San Jose, CA, United States
Are you an ASIC Verification Engineer that is on the market for a new opportunity at a highly funded and expanding startup, working on cutting edge projects at the forefront of autonomous driving and AI as a whole? At European Recruitment we are working alongside a widely successful Bosch, Continental and BMW backed startup with locations in the US
Job Source: USA Tech RecruitmentSan Jose, CA, United States
Staff / Sr. Staff Design Verification Engineer - RISC-V / ARM / MIPS CPU
We are seeking an experienced Senior Staff Verification Engineer. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and completely own verification closure for a block or feature. This position involves cross-functional interaction with CPU designers and architects and working across sites to ensure high-quality CPU designs for customers.
You will:
Take full ownership and drive verification efforts to closure.
Work closely with designers and architects to understand specifications at unit/top level.
Understand use cases and develop functional test plans.
Develop directed tests written in C, Assembly, and SystemVerilog.
Develop random test generators to stress microarchitectural implementations.
Analyze coverage and fix holes in the test plan.
Enhance the verification environment and testbench using the latest methodologies, tools, and automation.
Support for prototyping in FPGA and/or Emulation.
Ideally, you’ll have:
Familiarity with CPU architectures and superscalar designs and industry-leading RISC processors.
Exposure to various ASIC design verification tools with good digital design concepts.
Knowledge and experience with Interconnect protocols like AXI/ACE/OCP/CHI.
Scripting experience in Python/Perl/TCL/Shell
Experience in creating functional test plans and implementing them as part of pre-silicon verification.
Strong knowledge of Verilog/SystemVerilog/C/C++/Assembly.
Strong analytical and problem-solving skills.
Ability to be self-motivated with excellent communication and presentation skills.
Ability to collaborate well with local and global teams.
Masterss degree preferred in Electronics/Electrical/Computer Engineering with 7+ years of industry experience with a focus on functional verification in CPU verification.
A plus if you have:
Experience with RISC-V, ARM, and/or MIPS CPU.
Experience with multi-core and coherency
Familiarity with functional safety flows and requirements.
Please send a copy of your updated resume to [email protected]
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Email Alert for Sr. Staff Design Verification Engineer - RISC-V / ARM / MIPS CPU jobs in San Jose, CA, United States
ⓘ There was an unexpected error processing your request.
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