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Edacafe
San Francisco, CA, United States
The Networking Application Engineering team is looking for a hardworking, keen Hardware System Engineer to join and support groundbreaking technology. As an Application Engineer one will have a real impact on the business, while working closely with our customers and R&D teams. What you’ll be doing: Support the largest cloud providers worldwide emb
Job Source: EdacafeSnowflake
San Mateo, CA, United States
Build the future of data. Join the Snowflake team. We’re hiring a talented Software Engineering Manager to help us improve quality across multiple areas to fuel the Snowflake Data Cloud. As the Manager in the Software Design Engineer in Test team, you will lead and expand our distributed engineering team. Together with industry-wide experts in tes
Job Source: SnowflakeAbbott
Alameda
Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 115,000 colleagues serve people in more than 160 countries.T
Job Source: AbbottUnderstanding Recruitment Inc
San Francisco, CA, United States
Acceler8 Talent has recently partnered with a company that is redefining AI hardware, focusing on maximizing performance for large language models (LLMs) like GPT. With a commitment to cost efficiency and optimizing performance-per-dollar, their technology offers competitive latency and low-level hardware control. Their scalable hardware enables fa
Job Source: Understanding Recruitment IncArista Networks
San Francisco, CA, United States
Founded and funded by well-known Silicon Valley veterans Andy Bechtolsheim and David Cheriton, Arista Networks is a pre-IPO company igniting low latency datacenters, cloud networking, and cloud computing environments. Arista is building world-class, datacenter-focused Ethernet switches that redefine scalability, robustness, reliability and price-pe
Job Source: Arista NetworksDice
San Francisco, CA, United States
Dice is the leading career destination for tech experts at every stage of their careers. Our client, QATOS LLC, is seeking the following. Apply via Dice today! Candidate should have telecommunication domain experience Experience: 6+ Yrs Location: Preferred Bay Area candidates to be at client office twice a week Role: Test Engineer We are seeki
Job Source: DicePronto
San Francisco, CA, United States
While most Autonomous Vehicle (AV) technology companies are stuck in R&D mode, Pronto is a world-leader in commercializing AV tech via our Autonomous Haulage System, which is automating haulage operations at mines and quarries around the world. Pronto's team of Silicon Valley veterans has been at the forefront of every major AV development over the
Job Source: ProntoPSG Global Solutions
San Francisco, CA, United States
Description We're looking for a Test Engineer , working in Biotechnology/Medical Devices industry in 269 E Grand Ave, South San Francisco, California, 94080, United States . Top Responsibilities: Follow protocols to run, document, and complete analysis of system-level Verification tests. Conduct mechanical tests such as drop, impact, shock/v
Job Source: PSG Global SolutionsSan Francisco, CA, United States
Job Description:
One of our leading client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. If you are a hands-on DFT Engineer with strong tools and testing skills and can be client facing, we’d like to speak with you.
Qualifications:
Minimum of 8+ years hands-on work experience in ASIC DFT design. Experience in an SoC product development organization or in an ASIC vendor company along with customer facing experience preferable.
· BS/MS in Electrical Engineering, Computer Science, or related field
· Experience with Industry standard DFT/ATPG EDA tools like Tessent/TestMax/Modus. Experience with simulators and waveform debug tools.
· Strong knowledge of DFT methodologies, industrial standards, and practices
· Strong working knowledge of Chip design, Verilog/System Verilog, and design verification
· Experience with STA tools like Primetime, SDF generation and Gate-level simulations
· Understanding and expert handling of Verilog HDL based Netlists, design libraries and Scripting (Perl/Tcl)
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Email Alert for DFT Engineer Design For Test jobs in San Francisco, CA, United States
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