FPGA Emulation / Verification Engineer
Mountain View, CA, United States
Key Qualifications
Key Qualifications
The primary skills required for this job are RTL design, simulation, expertise in mapping designs to emulation, improving model performance, excellent communication skills, and ability to work in a fast-paced exciting environment.
The ideal candidate should have extensive experience in the following areas:
Hardware Emulation/FPGA Platforms and tools (Palladium/Zebu/HAPS)
Computer Architecture
RTL development
Verilog, SystemVerilog (DPI and transactors)
Simulation acceleration knowledge and FPGA prototyping
Programming/scripting skills (C, C++, Python)
Software Debug tools (e.g. gdb)
Problem solving skills
Description
Description
In this highly visible and interactive role, your primary responsibilities will be: - Create emulation models from RTL - Regress stress test on emulation and FPGA systems - Debug test failures on emulation and FPGA systems - Optimize models to be effectively executed on emulation and FPGA systems - Develop and maintain emulation/FPGA build and regression flow - Release models and support any issues
Pay Range: $65-100/hr
The specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment. Our full-time consultants have access to benefits including medical, dental, vision as well as 401K contributions.
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