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Analog IC Design Engineer

Santa Clara, CA, United States

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As an Analog IC Design Staff Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect

Transistor level design of high performance analog circuits such as amplifiers, comparators, LDOs, DACs, etc in sub-micronprocess technologies

Run simulations across process, temperature, and voltage corners as well as Monte Carlo statistical analysis

Supervise custom analog layout of the assigned IP blocks

Perform IC performance measurements on the bench as well as debug of design to correlate measurements with simulations

What We're Looking For

Candidate must be recently graduated with a PhD or MS in EE with one to three years of experience

Strong intuitive and analytical understanding of analog transistor level design

Good understanding of semiconductor device physics

Good understanding of analog circuitry (op-amps, comparators, etc)

Relevant analog IC design and/or power electronics coursework

Experience in Cadence schematics capture, simulation and layout tools

Experience with DC/DC converters and/or LDOs (preferred)

Hands-on experience with lab equipment such as power supplies, oscilloscopes, etc (preferred)

Familiarity with System Verilog (preferred)

#LI-TD1

Expected Base Pay Range (USD)

106,180 - 159,000, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

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