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Physical Design Engineer, Autopilot AI

Austin, TX, United States

**Physical Design Engineer, Autopilot AI**

Job CategoryEngineering & Information TechnologyLocationAustin, TexasReq. ID99077Job TypeFull-time Tesla participates in the

**Role:**

The Autopilot Hardware team is looking for a Physical Design Engineer to work in Austin, TX. This Engineer will be responsible for implementation of SOC and related IP from synthesis through tapeout.

**Responsibilities:**

* Drive power-optimized implementation of high-speed blocks through synthesis and place/route

* Write timing constraints, generate floor plans, and implement CTS or semi-custom clocking

* Work closely with RTL team to drive Power/Performance/Area optimizations

* Sign off analysis including EM/IR, static timing, LEC, and LVS/DRC

**Requirements:**

* Strong understanding of static timing

* Expertise using latest EDA design tools

* Experience on recent technology node

* Bachelors Degree and 2+ years experience

* Strong scripting skills (Tcl expected, Perl or Python desired)

Tesla participates in the

Tesla is an Equal Opportunity / Affirmative Action employer committed to diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state or local laws.

Tesla is also committed to working with and providing reasonable accommodations to individuals with disabilities. Please let your recruiter know if you need an accommodation at any point during the interview process.

For quick access to screen reading technology compatible with this site (free step-by-step ).

**Physical Design Engineer, Autopilot AI**

Job Category Engineering & Information Technology Location Austin, Texas Req. ID 99077 Job Type Full-time **Role:**

The Autopilot Hardware team is looking for a Physical Design Engineer to work in Austin, TX. This Engineer will be responsible for implementation of SOC and related IP from synthesis through tapeout.

**Responsibilities:**

* Drive power-optimized implementation of high-speed blocks through synthesis and place/route

* Write timing constraints, generate floor plans, and implement CTS or semi-custom clocking

* Work closely with RTL team to drive Power/Performance/Area optimizations

* Sign off analysis including EM/IR, static timing, LEC, and LVS/DRC

**Requirements:**

* Strong understanding of static timing

* Expertise using latest EDA design tools

* Experience on recent technology node

* Bachelors Degree and 2+ years experience

* Strong scripting skills (Tcl expected, Perl or Python desired)

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