Email Alert for
ⓘ There was an unexpected error processing your request.
Please refresh the page and try again.
If the problem persists, please contact us with your issue.
You can always manage your preferences and update your interests to ensure you receive the most relevant opportunities.
Get ready to discover your next great opportunity.
Wipro
Santa Clara, CA, United States
ATE Test Engineer (Advantest 93K) Location: Santa Clara, CA Permanent Role Job Overview: We are seeking a skilled and experienced ATE Advantest 93K Engineer to join our team. The ideal candidate will be responsible for the maintenance and troubleshooting of Advantest 93K Automatic Test Equipment (ATE) to ensure optimal performance and functionalit
Job Source: WiproCelestial AI
Santa Clara, CA, United States
About Celestial AI As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the 'Memory Wall' problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths wi
Job Source: Celestial AINVIDIA Corporation
Santa Clara, CA, United States
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing — with the GPU acting as the brains of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are i
Job Source: NVIDIA CorporationCelestial
Santa Clara, CA, United States
As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanos
Job Source: CelestialBowmore Group
Santa Clara, CA, United States
Responsibilities · Develop production, qualification, and characterization test programs for digital, analog, mixed-signal devices on ATE (Automatic Test Equipment) using Advantest 93K, Teradyne Uflex or other major test platforms. · In charge of test pattern conversion and verification prior to silicon to ensure “First Time Right Vector” for smoot
Job Source: Bowmore GroupAlphawave Semi
Milpitas, CA, United States
We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers,
Job Source: Alphawave SemiAmpere Computing
Santa Clara, CA, United States
Description The Role In this position, you will join a great team within Ampere and work with top talent in the industry and you will make contributions in Operations by supporting NPI and volume production. You will work with the team to develop engineering, characterization, and production test programs. You will be responsible for production t
Job Source: Ampere ComputingNVIDIA Corporation
Santa Clara, CA, United States
ATE Test Development Engineer page is loaded ATE Test Development Engineer Apply locations US, CA, Santa Clara time type Full time posted on Posted 3 Days Ago job requisition id JR1970283 We are looking for a creative ATE Test Development Engineer. NVIDIA has continuously reinvented itself for
Job Source: NVIDIA CorporationSanta Clara, CA, United States
Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with hyperscalers and the data center ecosystem, we are an innovation leader of products that are flexible, interoperable, and reliable. We are headquartered in the heart of California's Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.
Job Description
We are looking for Senior ATE Test Engineers with proven experience in developing and supporting complex mixed-signal silicon SoC products. The ideal candidate will develop and oversee SoC test strategy, interact with manufacturing partners, define, and implement ATE programs and own the product from design, initial samples all the way through high volume production ramp. The candidate should have working knowledge of communication/interface protocols such as PCI-Express (Gen-4/5), Ethernet, Infiniband, DDR, NVMe, USB, etc.
Basic Qualifications
Strong academic and technical background in electrical engineering. At minimum, a Bachelor's in EE is required, and a Master's is preferred.
≥5-year experience releasing complex SoC/silicon products to high volume manufacturing.
Working knowledge of high-speed protocols like PCIe, Ethernet, Infiniband, DDR, NVMe, USB, etc.
Professional attitude with ability to execute on multiple tasks with minimal supervision.
Strong team player with good communication skills to work alongside a team of high caliber engineers.
Entrepreneurial, open-mind behavior and can-do attitude.
Required Experience
Hands-on experience with high-speed mixed signal SoC test program/hardware development on multiple high-speed test platforms.
Collaboration with design team to define test strategy, create and own test plan.
Tester platform selection, design, and development of ATE hardware for wafer sort and final test.
Familiar with high-speed load board design techniques.
Proven track record of implementing ATE patterns to optimize tester resources and minimize ATE test time while maintaining product quality.
Strong knowledge and development of DFT techniques implemented in silicon that provide maximum defect and parametric device coverage - SCAN, MEMBIST, SerDes and other functional tests.
Skilled in control interfaces - I2C, I3C, SPI, MDIO, JTAG etc.
Expertise in production test of high speed SerDes operating at 16Gbps and higher.
Skilled in ATE programming, silicon/ATE bring-up, bench-ATE correlation and debug.
Experience with lab equipment including protocol analyzers and oscilloscopes.
Experience with using Advantest 93k ATE platform.
Proficiency in, at least, one modern programming language such as C/C++, Python.
Preferred experience
Fluent in data processing using high level programming languages.
Familiarity with modern databases.
The base salary range is $140,000.00 USD - $200,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
#J-18808-Ljbffr
Email Alert for Senior ATE Test Engineer jobs in Santa Clara, CA, United States
ⓘ There was an unexpected error processing your request.
Please refresh the page and try again.
If the problem persists, please contact us with your issue.
You can always manage your preferences and update your interests to ensure you receive the most relevant opportunities.
Get ready to discover your next great opportunity.