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ID.me
Sunnyvale, CA, United States
Role Overview At ID.me, the Sr UX Director for Wallet, Identity, and Communities is a pivotal leadership role overseeing the strategic vision and execution of UX design across these critical segments. You will lead, inspire, and motivate a large team of UX professionals, driving innovative solutions that meet business goals and enhance user experie
Job Source: ID.meIntel
Santa Clara, CA, United States
Job Details: Job Description: Job Description: Design for Test Engineering Group (DTEG) is Intel's central DFT organization driving DFT architectures, methodologies, IPs, and automation across Intel. DTEG is looking for a strong leader to drive a high performance global team to provide quality, on-time, standardized and innovative DFT solutio
Job Source: IntelID.me
Mountain View, CA, United States
Company Overview ID.me is a high-growth enterprise software company that simplifies how people prove and share their identity online. The company empowers people to control their data through a portable and trusted login, which means they don't need to create a new password when visiting sites that have the ID.me button. ID.me's digital identity n
Job Source: ID.meC3 AI
Redwood City, CA, United States
C3.ai, Inc. (NYSE:AI) is a leading provider of Enterprise AI software for accelerating digital transformation. The proven C3 AI Platform provides comprehensive services to build enterprise-scale AI applications more efficiently and cost-effectively than alternative approaches. The core of the C3 AI offering is an open, data-driven AI architecture t
Job Source: C3 AIWealthfront Corporation
Palo Alto, CA, United States
Wealthfront is looking for a Design Director to support two key product areas: Investing and Design Systems. Reporting directly to the VP of Design, this role is ideal for the design leader who enjoys working across strategy, vision, team, and operations. This is for someone who is excited about having impact through the scope and quality of decisi
Job Source: Wealthfront CorporationHackerRank
Mountain View, CA, United States
We are looking for: Experienced in managing end-to-end product design and providing design leadership Experienced in leading and growing a design team Expertise in Figma, Adobe Creative Cloud, and other tools for generating wireframes, designs, prototypes Experienced in building design systems, principles and operationalizing them across the org/co
Job Source: HackerRankSnorkel AI
Redwood City, CA, United States
We’re on a mission to democratize AI by building the definitive AI data development platform. The AI landscape has gone through incredible change between 2016, when Snorkel started as a research project in the Stanford AI Lab, to the generative AI breakthroughs of today. But one thing has remained constant: the data you use to build AI is the key t
Job Source: Snorkel AIArchinect
Palo Alto, CA, United States
ABOUT STANFORD UNIVERSITY AND RESIDENTIAL & DINING ENTERPRISES: Stanford University, located between San Francisco and San Jose in the heart of California's Silicon Valley, is one of the world's leading teaching and research universities. Since its opening in 1891, Stanford has been dedicated to finding solutions to big challenges and to preparing
Job Source: ArchinectSanta Clara, CA, United States
Job Details: Job Description: Job Description:
Design for Test Engineering Group (DTEG) is Intel's central DFT organization driving DFT architectures, methodologies, IPs, and automation across Intel. DTEG is looking for a strong leader to drive a high performance global team to provide quality, on-time, standardized and innovative DFT solutions. These activities include DFT architecture/methodology development and deployment, validation, fault grading, tools development, customers support, and more. This position reports into the GM of PESG. This person will partner with Intel design teams across different geos to provide optimized DFT solutions for highest quality IP and SOC designs. This person will manage DFT TFM vendor relations and drive innovation with industry partners. They will also drive DFT standardization, provide issue resolution, capture learnings, and rapidly apply across Intel.
Key role objectives include:
Establish and drive a DFT strategy to drive methodology convergence through the Intel product design life cycle.
Understand internal customer requirements and challenge to provide coherent DFT solutions.
Work closely with Intel design teams to co-optimize the tools, flows and methods.
Embrace new technologies like Machine Learning, AI and Generative AI.
Continually enhance organizational and leadership capabilities to create a diverse, growth-capable, high-performance team.
Established record of success as a senior-level leader within the DFT services area. Established record of success in managing at leadership level down to front line engineering.
Proven experience in building a high-performance team, developing leaders, driving change and culture
Candidate should have a very good understanding of various DFT techniques such as scan/ATPG, memory BIST, TAP architecture, fault grading, etc.
Experience leading and building teams through setting goals, schedule and staging plans along with tracking and enabling execution for the team.
Hands-on experience on silicon enabling and debug solutions.
Qualifications: Qualification:
Bachelors, Masters, or Ph.D. in a related engineering field
10+ years leadership experience
10+ years of experience and deep knowledge of JTAG/TAP architecture, IEEE specs and design implementation for large SOCs.
10+ years of experience in design & verification of DFT fabrics & test ports for post-silicon content. Knowledge of ATE testers.
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, Oregon, Hillsboro Business group: In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in
US, California:$195,317.00-$341,559.00 S al ary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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Email Alert for Senior Director Design jobs in Santa Clara, CA, United States
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