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AMD
Santa Clara, CA, United States
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinn
Job Source: AMDbaidu
Sunnyvale, CA, United States
Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges in AI industry and have the desire to solve them? Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities and impact on AI industry? We’re looking forward to you joining us to collaborate, contribute, an
Job Source: baiduIntel
Santa Clara, CA, United States
Job Details: Job Description: We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology. The Data C
Job Source: IntelSamsung Research America
Mountain View, CA, United States
Lab Overview: The Samsung SOC Lab vision provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with
Job Source: Samsung Research AmericaNVIDIA Corporation
Santa Clara, CA, United States
Senior GPU Memory Architect page is loaded Senior GPU Memory Architect Apply locations US, CA, Santa Clara US, NC, Durham time type Full time posted on Posted 10 Days Ago job requisition id JR1972549 We are now looking for a Senior GPU Memory Architect. NVIDIA is seeking a motivated architect
Job Source: NVIDIA CorporationApple, Inc.
Santa Clara, CA, United States
Summary Posted: Mar 27, 2024 Role Number: 200448265 Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You
Job Source: Apple, Inc.Apple Inc.
Santa Clara, CA, United States
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly a
Job Source: Apple Inc.Apple
Santa Clara, CA, United States
GPU Architect – Memory Hierarchy Santa Clara,California,United States Hardware Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor
Job Source: AppleSan Jose, CA, United States
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Memory Architect Intern
Location US (San Jose/Austin)
Summary
We are looking for an intern to help build performance models, perform architectural tradeoff analysis and enable data driven design decisions for our next generation DDR memory controller architectures that can meet todays complex SoC and workload requirements. An architecture foundation and hardware modelling experience (C++/Python) is desired.
Responsibilities
Develop cycle-level C++/SystemC performance models and analysis of hardware features, applications, benchmarks, and use cases
Analyze memory subsystem-level architectural trade-offs (throughput, latency, power, hardware cost) across different scenarios
Develop synthetic memory traffic/traces that are representative of real-world SoC components (CPU, GPU, DSP, NoC, etc)
Develop scripts to automate generation of various performance metrics and statistics post RTL simulation that helps identify performance bottlenecks
Correlate performance models to match RTL across configurations and traffic conditions
Work with Memory Architects to understand feature requirements and evaluate architectural choices and tradeoffs
Required Skills
Currently pursuing a MS in Electrical/Computer Engineering or equivalent
Strong coding skills in C++/SystemC, python and similar programming languages
Basic understanding of performance principles, e.g. Amdahls Law, Queuing Theory, throughput/latency tradeoffs
Additional Skills
Experience in architecture analysis and hardware modeling (functional or performance) and simulator development skills
Understanding RTL, analyzing waveforms
Understanding of memory protocols and timing DDR4, DDR5, LP4, LP5
Experience with industry standard or academic performance simulators at any level Memory, SoC, CPU models
Experience using performance benchmarks
Concepts related to Quality of Service (QoS) and how memory controller can tradeoff performance and QoS
Were doing work that matters. Help us solve what others cant.
Memory Performance Architect jobs in San Jose, CA, United States
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