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Cantos Ventures

San Francisco / Global

FPGA Engineer

Job Description

Astranis is seeking a Senior FPGA Engineer to own the architecture, design, verification, and test of RTL for space-qualified FPGAs, collaborating with software, DSP and hardware teams. You will design RTL for high-performance systems, work with multiple FPGAs, interface with high-speed data converters, implement radiation mitigation schemes, and partner with DSP/radio algorithms and embedded teams.

Base salary range is $175,000—$240,000 with equity and robust benefits.

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