Qualcomm
San Diego / Global
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San Diego / Global
Qualcomm Technologies, Inc. Job Opportunity Qualcomm is a global technology leader driving innovations in wireless communications, AI, computing, and connected systems. Our engineering teams develop industry-leading silicon, software, FPGA prototyping platforms, emulation systems, and validation solutions that enable the next generation of mobile, automotive, AI, and edge computing products.
Role Summary We are seeking highly motivated engineers to join Qualcomm's SoC Design, Validation, Debug, Infrastructure, FPGA, and Emulation organizations. In this role, you will work on industry-leading SoCs and development platforms spanning design, validation, system debug, silicon characterization, CAD software, FPGA prototyping, and emulation.
You will collaborate closely with architects, RTL designers, verification engineers, software developers, and validation teams to develop innovative solutions that improve product quality, accelerate system bring-up, and enable next-generation computing platforms.
Key Responsibilities Develop and enhance solutions supporting SoC design, validation, debug, FPGA prototyping, and emulation environments.
Design, implement, validate, and debug hardware and software components used in advanced SoC development platforms.
Perform pre-silicon and post-silicon bring-up, failure analysis, root-cause investigation, and performance characterization.
Develop automation, infrastructure, and tooling using modern programming languages and scripting environments.
Support debugging of low-level hardware and software issues across complex SoC platforms.
Analyze system performance, power, functionality, reliability, and timing across multiple subsystems.
Collaborate with global engineering teams, technology partners, and tool vendors to improve methodologies, workflows, and product quality.
Leverage automation and AI technologies to improve engineering productivity and debug efficiency.
Qualifications Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
Experience in one or more of the following areas:
ASIC / SoC Design
Hardware or System Debug
Validation Engineering
FPGA Development
Emulation Platforms
CAD / EDA / Software Development
Strong analytical, debugging, and problem-solving skills.
Ability to work effectively in a collaborative, cross-functional environment.
Preferred Qualifications Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field.
Experience with complex SoC architectures including CPUs, DSPs, GPUs, DDR, NoCs, peripherals, and interconnects.
Experience with Linux and embedded software development.
Familiarity with modern AI-assisted engineering workflows and automation technologies.
Core Technical Skills Programming & Software
C/C++
Python
Tcl
Perl
Linux / Embedded Linux
Software Design and Development Practices
Automation and Scripting
Hardware & SoC
ASIC Design
SoC Architecture
Hardware Validation
Hardware Debug
Performance and Power Analysis
RTL Design
Verilog / SystemVerilog
FPGA Design
Tools & Infrastructure
JTAG Debug
Git
JIRA
CI/CD Automation Flows
Simulation, Emulation, and Prototyping Tools
Linux Development Environments
Hardware and Software Debug Tools
Specialized Skills Areas: Candidates may specialize in one or more of the following domains:
Content and Validation: SoC/System Validation Expertise – End-to-end pre-silicon and post-silicon validation, bring-up, system integration, and silicon debug.
Hardware-Software Co-Debug – Strong debugging across SoC architecture, embedded software, firmware, drivers, and hardware interfaces.
Validation Content & Framework Development – Design scalable test content, automation frameworks, CI/CD pipelines, analysis, and debug infrastructure.
Low-Level Programming – Proficiency in C/C++, Python, Assembly, Linux, device drivers, and bare-metal software development.
Architecture & Domain Knowledge – Deep understanding of CPU, DDR, NoC/interconnects, memory hierarchy, clock/power management, low-power modes, and performance architecture.
Performance, Power & Concurrency Analysis – System-level validation of bandwidth, latency, QoS, throughput, scalability, and power-performance tradeoffs.
Pre-Silicon Platforms – Experience with simulation, emulation (RUMI/Veloce/FPGA), RTL understanding, and validation readiness.
AI-Driven Validation – Applying AI/ML to improve validation productivity.
Lab & Debug Tools – Hands-on experience with JTAG, logic analyzers, oscilloscopes, kernel debuggers, and silicon debug methodologies.
Technical Leadership & Cross-Functional Collaboration – Work effectively across architecture, design, firmware, software, and validation teams to drive silicon quality.
Silicon Validation & Debug Pre-silicon and post-silicon bring-up
Failure analysis and root-cause debugging
Platform-level debug
Lab equipment usage
JTAG and trace-based debugging
PVT and marginality analysis
AI-assisted debug automation
Power & Performance Validation Power characterization
Thermal analysis
Vmin/Fmax characterization
CPU/GPU/DDR/NoC analysis
Performance optimization
Low-power design methodologies
DFT & Manufacturing Validation MBIST
ATPG
Structural testing
Yield analysis
Scan-based debug
Silicon characterization
FPGA Firmware & Embedded Systems Xilinx and Intel FPGA platforms
FPGA firmware development
Embedded Linux
PCIe, AXI, Ethernet, and I2C protocols
High-speed digital design
Clock domain crossing and timing closure
Emulation & Platform Methodology FPGA prototyping
Palladium and Veloce platforms
Emulation build generation
Platform bring-up
System-level debug methodologies
Timing closure and deployment flows
CAD & EDA Software Development CAD tool development
Algorithms and data structures
Emulation infrastructure
Synthesis optimization
Partitioning
Clock optimization
Compute and storage optimization
Why Join Us Work on industry-leading mobile, AI, automotive, and computing SoCs.
Collaborate with world-class engineers across hardware, software, FPGA, emulation, validation, and debug domains.
Solve challenging technical problems that span the entire silicon development lifecycle.
San Diego / Global
San Diego / Global
San Diego / Global
San Diego / Global
San Diego / Global
San Diego / Global