Micron Technology
Boise / Global
DMTS Design Engineer
- $208.000 - $416.000
You have blocked notifications
Oops! You have blocked notifications. Click here for more info
You have blocked notifications, please check your browser settings.
You're currently subscribed to job notifications
Subscribe to notifications
You will no longer receive notifications
Boise / Global
Department Overview
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
DRAM Engineering (DRAM Memory) focuses on designing and developing Micron’s industry leading dynamic random access memory products. The team drives process R&D, product design, and technology development for cutting edge DRAM nodes, including DDR5, LPDDR, HBM, and GDDR products that form the foundation of Micron’s global revenue leadership. We work across architecture, engineering, and business teams to evaluate innovative memory solutions and influence product direction.
Role Overview
We are seeking an experienced Distinguished Member of Technical Staff (DMTS) Design Engineer to join the DRAM System team. This role is at the center of memory innovation, analyzing current and next‑generation memory technologies, identifying performance and design gaps, and guiding teams on future memory direction. Your work will directly influence architecture, product strategy, and competitive positioning, making it both highly visible and technically rewarding.
As a Technical Leadership Program member, you will influence, lead, and mentor others within Micron.
Responsibilities
Analyze DDR4, DDR5, LPDDR, and emerging memory technologies across electrical, thermal, power, and performance dimensions.
Identify performance gaps and evaluate trade‑offs in cost, latency, bandwidth, and efficiency.
Partner with architecture and product teams to translate analysis into actionable design guidance.
Drive multi‑functional alignment with firmware, validation, hardware, and business partners.
Deliver clear technical assessments and recommendations to guide future memory strategy.
Utilize Artificial Intelligence tools to build models that locate design gaps and summarize all collected data for distribution and analysis.
Minimum Qualifications
Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Strong understanding of DDR memory architecture including timing, signaling, and system behavior.
Experience analyzing memory systems at device and system levels.
Knowledge of high‑speed I/O, electrical margins, and memory power and thermal characteristics.
Proven ability to evaluate trade‑offs and communicate data‑driven recommendations.
Preferred Qualifications
Experience with DDR4/5, LPDDR5/5X/5T, or advanced DRAM technologies.
Background in memory controller architecture, firmware, or training algorithms.
Familiarity with DRAM physical layout, packaging, and topology impacts.
Experience in benchmarking, competitive analysis, or product architecture strategy.
Exposure to memory modeling, workload analysis, or system‑level simulation.
Compensation and Benefits
US base salary range: $208,000.00 - $416,000.00 per year. Additional compensation may include benefits, bonuses, and equity.
Micron offers a comprehensive benefits package that includes medical, dental, and vision plans; income protection; paid family leave; paid time‑off; and paid holidays.
Micron is an equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.
#J-18808-Ljbffr
Boise / Global
Boise / Global
Boise / Global
Boise / Global
Boise / Global
Boise / Global