Cadence Design Systems
Austin / Global
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Austin / Global
Cadence Design Systems, Inc. in Austin is seeking an engineer to join the DDR PHY IP Front End Design team. You will develop firmware for DDR5 PHY using microcontrollers and work with hardware and memory subsystem architects on training algorithms. The role focuses on bare-metal C firmware development, RTL-based simulations, and silicon bring-up board testing. Collaboration with verification teams is essential to ensure firmware-hardware co-verification.
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Austin / Global
Austin / Global
Austin / Global
Austin / Global
Austin / Global
Austin / Global