Design Verification Engineer

About the Company

We are a leading technology company dedicated to innovation and excellence in the field of software development. Our mission is to create cutting-edge solutions that empower businesses and enhance user experiences. We foster a collaborative culture that values diversity, creativity, and continuous learning.

About the Role:

The successful candidate will play a crucial role in the development and verification of complex systems using System Verilog and UVM methodologies. This position requires a strong understanding of hardware design and verification processes.

Responsibilities:

• Develop and implement testbenches using System Verilog and UVM.
• Collaborate with design engineers to understand specifications and requirements.
• Perform functional verification of digital designs.
• Debug and troubleshoot issues in the verification environment.
• Document verification plans and results.

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• Master's degree is a plus.

Required Skills:

• Proficiency in System Verilog and UVM.
• Strong understanding of digital design concepts.
• Experience with simulation tools and methodologies.

Preferred Skills:

• Familiarity with other verification methodologies.
• Experience in a team-oriented environment.
• Knowledge of scripting languages such as Python or Perl.

Equal Opportunity Statement:

We are an equal opportunity employer and are committed to fostering an inclusive environment for all employees. We celebrate diversity and are dedicated to creating a workplace where everyone feels valued and respected.